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Analysis and Characterization of GaAs MOSFET with High-K Dielectric Material

von Krupal Pawar (Autor) Vasudha Patil (Autor)

Wissenschaftlicher Aufsatz 2015 8 Seiten

Ingenieurwissenschaften - Nachrichtentechnik / Kommunikationstechnik

Leseprobe

Abstract:

Analysis and characterization of the GaAs MOSFET with High-k gate dielectric material and also do the small signal analysis and noise analysis using TCAD tool. In present research work GaAs is employed as substrate material. Band gap of GaAs is about 1.43eV. Lattice constant for GaAS is 5.65A. Substrate doping is 1x10^16 cm-3. HFO2 gate dielectric deposited on GaAs(100) substrate. HFO2 film is 20nm thick. Dielectric constant of HFO2 is order of 20-25. Permittivity (F cm^-2) is 20€0. Band gap (eV) is 4.5-6.0.HFO2 grown by Atomic Layer Deposition on GaAs. The transition metal Au is proposed dopant for GaAs. Source/Drain junction depth is 20nm. Doping levels of drain source are 1e20. Gold is used for gate metal. A working GaAs device is simulated and out performs the Si core device due to its increased mobility. It also decreases leakage current. Solve the problem of Fermi level pinning. So GaAs MOSFET is always better than Si MOSFET.

Keywords: GaAs MOSFET,TCAD,HFO2Gate.

1. INTRODUCTION

1.1Basic MOS capacitance structure

Metal-Oxide-Semiconductor (MOS) capacitors are the heart of every digital circuit such as single memory chip, dynamic random-access memory (DRAM), switched capacitor circuits, analog-to-digital converters and filters, optical sensors and solar cells. A schematic view of a MOS capacitor is shown in the Fig.1.The MOS capacitor is parallel plate capacitor with silicon (S) as one electrode and the metal (M) as the other electrode. The insulator is generally an oxide (O) layer of silicon. The metal electrode is also known as the gate of the system. The silicon has an ohmic contact to provide an external electric contact. The thickness of the insulator (oxide) layer is denoted by d, and it determines the capacitance of the MOS capacitor. VG is the voltage applied to the gate of the MOS capacitors.

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Fig.1: Basic MOS capacitance structure

Compound III-V materials are attractive for achieving enhanced n-FET mobility, due to their high bulk electron mobility. III-V channel n-MOSFETs can achieve performance enhancement as well as reduced dynamic power consumption for a fixed performance level. Si CMOS technology has been driven by device scaling to increase performance, as well as reduce cost and maintain low power consumption. However, as devices are scaled below the 100nm region, performance gain has become increasingly difficult to obtain by traditional scaling. High mobility materials can greatly improve the power performance tradeoff which is a tremendous advantage for VLSI digital applications. Currently in industry, mobility enhancement is achieved by applying strain to conventional Si MOSFETs, either through process-induced strain or substrate engineering. However, the mobility benefits that can be achieved by staining Si are limited and reduced by scaling, and there is great interest in studying non-Si channel materials to achieve even higher motilities. For gate materials, traditional SiO2 is being replaced by High-k dielectric to reduce the gate leakage current.

1.2 GaAs used as substrate

GaAs is the most common in use after silicon. III-V compound semiconductor is use due to their outstanding electron transport properties, their relative maturity and demonstrated reliability when compared with other candidates, such as carbon nanotube transistors and semiconductor nanowires. Moreover, it is well known that III-V-based MOSFETs usually have relatively low thermal tolerance in the device fabrication process. For instance, the interface between the gate oxide and III-V materials can be easily degraded during high temperature processes such as the annealing step after ion-implantation in conventional inversion-mode MOSFETs. The amount of energy required for an electron to move from the valence band to the conduction band depends on temperature, the semiconductor material and material’s purity and doping profile. For undoped GaAs, the energy band gap at room temperature is 1.42eV. The electron affinity for GaAs is 4.07 eV. GaAs have several advantages over Si for operation in the microwave region-primary, higher mobility and saturated drift velocity and the capacity to produce devices on a semi-insulating substrate.

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Table: 1.Comparison of physical and semiconductor Properties of GaAs and Si.

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Table: 2. Different high k material.

2. Introduction to silvaco tcad tool

2.1 Process Simulator-ATHENA

ATHENA: A Two-Dimensional Process Simulation Framework is a comprehensive software tool for modeling semiconductor fabrication process. ATHENA provides facilities to perform efficient simulation analysis that substitute for costly real world experimentation. ATHENA combines high temperature process modeling such as impurity diffusion and oxidation, topography simulation, and lithography simulation in a single, easy to use framework.

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Fig.2: Athena Framework

2.3 Device Simulator-ATLAS

ATLAS is a physically based two and three-dimensional device simulator. It predicts the electrical behavior of specified semiconductor structure, and provides insight into the internal physical mechanisms associated with device operation. ATHENA is frequently used in conjunction with the ATLAS device simulator. ATHENA predicts the physical structure that result from processing .these physical structure are used as input b ATLAS, which then predicts the electrical characteristics associated with specified bias condition. The combination of ATHENA and ATLAS makes it straightforward to determine the impact of process parameter on device characteristics.

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Fig.3: Atlas Framework

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Details

Seiten
8
Jahr
2015
ISBN (eBook)
9783656895534
Dateigröße
1 MB
Sprache
Englisch
Katalognummer
v289225
Note
Schlagworte
analysis characterization gaas mosfet high-k dielectric material

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Titel: Analysis and Characterization of GaAs MOSFET with High-K Dielectric Material